Senior Staff Engineer Chip Package Board - CoDesign Flow and Methodology
Infineon Technologies Austria AGKI-Zusammenfassung
Join Infineon’s Research & Development team in Villach, Austria
As a Senior Staff Engineer Chip Package Board - CoDesign Flow and Methodology, you will define and drive the technical roadmap for Chip-Package-Board (CPB) design methodologies, flows, tools, and digital engineering capabilities. You will translate business needs into methodology enhancements, lead AI and automation initiatives, and provide technical leadership to global stakeholders.
- Key Responsibilities:
- Define technical roadmap for CPB design methodologies, flows, tools, and digital engineering capabilities
- Translate Business Line needs into methodology enhancements and EDA roadmap requirements
- Drive continuous improvement of CPB methodologies to accelerate design convergence and improve quality
- Identify future capabilities for advanced packaging, heterogeneous integration, and AI-assisted workflows
- Lead AI, automation, and digitalization initiatives for measurable engineering value
- Provide technical leadership, consulting, and enablement for global user communities
- Required Profile:
- Degree in Electrical Engineering, Microelectronics, Physics, Computer Engineering, or related field
- Minimum 8 years of experience in semiconductor development, design methodologies, or EDA environments
- Strong understanding of semiconductor product development across chip, package, board, and system levels
- Proven experience defining and deploying engineering methodologies and design flows
- Experience with EDA tools (Cadence, Synopsys, Keysight, Comsol) and digitalization concepts
- Strong analytical, strategic thinking, and cross-functional leadership skills
- Fluent English required; German preferred
We offer: Competitive compensation per collective agreement (group H), 14 monthly payments, opportunities for professional growth in a global innovation-driven environment. Infineon is committed to diversity and inclusion.
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