Senior Staff Engineer Chip Package Board - CoDesign Flow and Methodology

Infineon Technologies Austria AG
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KI-Zusammenfassung

In dieser Rolle definieren und steuern Sie die technische Roadmap für Chip-Package-Board-Designmethoden und -flüsse. Sie arbeiten eng mit Geschäftsbereichen und Ingenieurteams zusammen, um Methodikverbesserungen und Automatisierungskonzepte zu entwickeln. Zudem leiten Sie Initiativen zur digitalen Transformation und bieten technische Unterstützung für globale Benutzer.

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Your Role

  • Define and drive the technical roadmap for Chip-Package-Board (CPB) design methodologies, flows, tools, and digital engineering capabilities. Partner closely with Business Lines, Design Centers, and engineering communities.
  • Translate Business Line needs into methodology enhancements, design-flow improvements, simulation capabilities, automation concepts, and EDA roadmap requirements.
  • Drive continuous improvement of CPB methodologies and engineering workflows to accelerate design convergence, improve design quality, and increase first-pass success.
  • Identify and shape future capabilities required for advanced packaging, heterogeneous integration, System-in-Package (SiP), 3D design methodologies, multi-domain simulation, and AI-assisted engineering workflows.
  • Lead AI, automation, data, and digitalization initiatives that deliver measurable engineering and business value.
  • Provide technical leadership, consulting, training, and enablement for global user communities and stakeholders.

Your Profile

  • Degree in Electrical Engineering, Microelectronics, Physics, Computer Engineering, or related field, with minimum 8 years of experience in semiconductor development, design methodologies, EDA environments, package development, design automation, simulation, or related fields.
  • Strong understanding of semiconductor product development, including chip, package, board, simulation, and system-level interactions.
  • Proven experience in defining, optimizing, and deploying engineering methodologies and design flows.
  • Experience working with EDA technologies and vendors (e.g., Cadence, Synopsys, Keysight, Comsol).
  • Strong customer-oriented mindset with ability to balance operational excellence with long-term methodology, technology, and business strategy.
  • Proven track record of leading cross-functional initiatives.
  • Fluent English skills required; German language skills are advantage.

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