Master Thesis - PCB Optimization for AI Power Supply Topologies (f/m/div)

#WeAreIn to create tiny chips and big careers. Are you ready to take the first step in your career? Let's shape the future together! Whether you join as a student, intern, or trainee, you'll be part of something real - real projects, real impact, and real opportunities to grow. Are you in?

Your role

• Scope: Build on prior project work to investigate parasitic impedance in test-board layouts and develop a Design-for-Test (DfT) test circuit for precise impedance measurements and future power-circuit optimization
• Measurement: Deepen your understanding of self-inductance and its impact on signal integrity in printed circuit boards (PCB) and perform targeted measurements
• Simulation: Enhance circuit-simulation skills using tutor-provided example circuits
• Prototyping: Design, lay out, and evaluate a power-converter test board
• Optimization: Propose an optimized PCB layout to reduce switching noise in the circuit
• Validation: Compare measurement results with available simulation and calculation outcomes

Type of employment: Temporary / Full-time (flexible working hours from Monday to Friday between 6 a.m. and 7 p.m.) Duration: 8 months

Education: Currently enrolled in a Master in Power Electronics, Electrical Engineering or related, a completed Bachelor in Electronics or Electrical Engineering is preferred

Technical Skills: Able to read and understand electronic schematics and PCB layouts, capable of simulating electronic circuits, previous experience in PCB design and layout is highly appreciated

Mindset: Self-motivated with a hands-on approach, able to align a flexible schedule with your curriculum and project needs

Collaboration: Ready to work and cooperate within an international team of researchers

Language Skills: Good English, German is a plus

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