Staff Engineer Mixed Signal Layout

Infineon Technologies Austria AG
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KI-Zusammenfassung

In dieser Rolle als Staff Engineer Mixed Signal Layout sind Sie verantwortlich für die Durchführung von Full-Custom-Layouts für hochfrequente RF-Blöcke und Hochgeschwindigkeits-SerDes-Komponenten. Sie optimieren Layouts, führen physikalische Verifikationen durch und minimieren parasitäre Effekte, während Sie ein kleines Team von Layout-Ingenieuren leiten und betreuen. Ihre Expertise in analogen/RF-IC-Layouts und Ihre Kommunikationsfähigkeiten sind entscheidend für den Erfolg in dieser Position.

Staff Engineer Mixed Signal Layout (f/m/div)

Villach (Austria)

Your Role

  • Full Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for high-frequency RF blocks and high-speed SerDes components
  • Layout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-ends
  • Physical Verification: Run and debug full-chip physical verifications including DRC, LVS, ERC, and Antenna rule checks
  • Parasitic Management: Analyze and minimize parasitic resistance, capacitance, and inductance to ensure signal and power integrity at high frequencies
  • Top-Level Integration: Floorplanning, pad-ring assembly, and final chip integration considering ESD, latch-up, and electro-migration (EM) guidelines
  • Leader- & Mentorship: Technical Leadership during project execution and mentor junior layout engineers within the team

Your Profile

  • Education: A university (of applied sciences) degree in Electrical Engineering or comparable
  • Experience: +5 years of hands-on experience in CMOS and FinFET semiconductor technologies
  • RF Expertise: Proven track record in analog/RF IC layout including high-speed interfaces (e.g., PCIe, Ethernet, USB, or custom SerDes) operating at multi-gigabit data rates
  • Tool Expertise: High proficiency with industry-standard EDA tools (Cadence Virtuoso, Siemens Calibre, ...)
  • Problem-Solving: Excellent analytical skills to independently debug complex layout and physical verification issues
  • Communication Skills: Excellent communication skills to bridge technical gaps across global, multi-disciplinary engineering teams
  • Leadership & Teamwork: Strong leadership skills with the ability to guide, motivate, and coordinate small layout team during the project execution and to collaborate closely with RF Design Engineers
  • Languages: Fluent in English

We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G (https://www.feei.at/leistungen/informations-service/mindestlohne-und-gehalter). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

Contact: Mag. Stefanie Triebelnig, BA, LinkedIn

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